1. Field of the Invention
Embodiments of the present invention relate to a flash memory card including an integrated circuit package including a leadframe having a non-linear or curvilinear outline.
2. Description of the Related Art
As the sizes of electronic devices continue to decrease, the associated semiconductor packages that operate them are being designed with smaller form factors, lower power requirements and higher functionality. Currently, sub-micron features in semiconductor fabrication are placing higher demands on package technology including higher lead counts, reduced lead pitch, minimum footprint area and significant overall volume reduction.
One branch of semiconductor packaging involves the use of a leadframe, which is a thin layer of metal on which one or more semiconductor die are mounted and supported. The leadframe includes electrical leads for communicating electrical signals from the one or more semiconductors to a printed circuit board or other external electrical devices. FIG. 1 shows a leadframe 20 before attachment of a semiconductor die 22. A typical leadframe 20 may include a number of leads 24 having first ends 24a for attaching to semiconductor die 22, and a second end (not shown) for affixing to a printed circuit board or other electrical component. Leadframe 20 may further include a die attach pad 26 for structurally supporting semiconductor die 22 on leadframe 20. While die attach pad 26 may provide a path to ground, it conventionally does not carry signals to or from the semiconductor die 22. In certain leadframe configurations, it is known to omit die attach pad 26 and instead attach the semiconductor die directly to the leadframe leads in a so-called chip on lead (COL) configuration.
Semiconductor leads 24 may be mounted to die attach pad 26 as shown in FIG. 2 using a die attach compound. Semiconductor die 22 is conventionally formed with a plurality of die bond pads 28 on at least first and second opposed edges on the top side of the semiconductor die. Once the semiconductor die is mounted to the leadframe, a wire bond process is performed whereby bond pads 28 are electrically coupled to respective electrical leads 24 using a delicate wire 30. The assignment of a bond pad 28 to a particular electrical lead 24 is defined by industry standard specification. FIG. 2 shows less than all of the bond pads 28 being wired to leads 24 for clarity, but each bond pad may be wired to its respective electrical lead in conventional designs. It is also known to have less than all of the bond pads wired to an electrical lead as shown in FIG. 2.
Typically, leadframe 20 is initially formed from a panel including a plurality of such leadframes. The semiconductor die 22 are mounted and electrically connected to each leadframe in the panel, and the integrated circuits formed thereby are encapsulated in a molding compound. Thereafter, the individual encapsulated integrated circuits are cut from the panel, or singulated, into a plurality of semiconductor packages.
Some conventional substrate-based packages and cards have curvilinear-shaped footprints. As one example, the industry standard Transflash flash memory card, introduced by SanDisk Corporation of Sunnyvale, Calif., is shown in top view and bottom view in FIGS. 3 and 4, respectively. As seen therein, Transflash card 30 includes a generally rectangular shape having sides 32 through 38 joined by rounded corners. Side 32 of the card includes a notch 40 and an angled recessed section 42 defined in an upper portion of side 32 so that the top edge 34 of card 30 is narrower than the bottom edge 38 of the card. Other memory cards, such as for example, a secure digital (“SD”) card and a Micro SD card similarly include a curvilinear shape having rounded edges, notches, and/or a chamfer.
Several methods are known for cutting semiconductor packages having curvilinear shaped edges from a panel of encapsulated integrated circuits. Known cutting methods include, for example, water jet cutting, laser cutting, water guided laser cutting, dry media cutting and diamond coated wire cutting. Such cutting methods are able to achieve sophisticated rectilinear and/or curvilinear shapes of the individualized integrated circuit packages. A more detailed description of methods for cutting encapsulated integrated circuits from a panel, and the shapes which may be achieved thereby, is disclosed in published U.S. Patent Application No. 2004/0259291, entitled “Method for Efficiently Producing Removable Peripheral Cards,” which application is assigned to the owner of the present invention and which application is incorporated by reference herein in its entirety.
While known cutting methods are effective at achieving curvilinear shapes in individualized semiconductor packages, these methods require precision cutting, and add complexity and cost to the semiconductor fabrication process.